Publications


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Journal/Book chapter

Haohuan Fu
Application-Specific Number Representation
Phd Dissertation at Imperial College London Department of Computing. February 2009.
[Abstract][pdf]

Haohuan Fu, Altaf Gaffar, Oskar Mencer, Wayne Luk
Bit-width Analysis Across Multiple Number Representations
Submitted to IEEE Transactions on VLSI. March, 2009.

Haohuan Fu, Oskar Mencer, Wayne Luk
FPGA Designs with Optimized Logarithmic Arithmetic
Submitted to IEEE Transactions on CAS-I. March, 2009.

Haohuan Fu, William Osborne, Robert G. Clapp, Oskar Mencer,, Wayne Luk
Accelerating Seismic Computations Using Customized Number Representations on FPGAs
EURASIP Journal on Embedded Systems. vol. vol. 2009, doi:10.1155/2009/382983, no. Article ID 382983, pp. 13. 2009.
[pdf]

Sriram, V., Kearney, D., Mencer, O., Frick, R.
An Accurate Ultra Fast Kolmogorov Phase Screen Generator
Accepted for publication in a Special Issue of the International Journal of Modern Physics D (IJMPD), 2009. 2009.

Kubilay Atasu, Can Özturan, Günhan Dündar, Oskar Mencer, Wayne Luk
CHIPS: Custom Hardware Instruction Processor Synthesis
IEEE Transactions on Computer-Aided Design. vol. 27, no. 3, pp. 528-541. March, 2008.

J.G.F. Coutinho, M.P.T. Juvonen, J.L. Wang, B.L. Lo, W. Luk, O. Mencer, G.Z. Yang
Designing a Posture Analysis System with Hardware Implementation
Kluwer Journal of VLSI Signal Processing. vol. 47, no. 1, pp. 33-45. April, 2007.

Kubilay Atasu
Hardware/Software Partitioning for custom instructions processors.
Phd Dissertation at Institute for Graduate Studies in Science and Engineering Bogazici University. 2007.
[Abstract][pdf]

Dong-U Lee, Altaf Abdul Gaffar, Ray C.C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides
Accuracy Guaranteed Bit-Width Optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. vol. 25, no. 10, pp. 1990-2000. Oct, 2006.
[Abstract][ps][pdf]

Oskar Mencer
ASC, A Stream Compiler for Computing with FPGAs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. vol. 25, no. 9, pp. 1603-1617. Sept, 2006.
[Abstract][ps][pdf]

Jacob Bower, Oskar Mencer, Wayne Luk, Michael J.Flynn, Martin Morf
Dynamic Clock-Frequencies for FPGAs
Elsevier Journal of Microprocessors and Microsystems, special issue. Sept, 2006.

Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk
Optimizing Hardware Function Evaluation
IEEE Transactions on Computers. vol. 54, no. 12, pp. 1520-1531. Dec, 2005.
[Abstract][ps][pdf]

Tim J. Todman, George A. Constantinides, Steve J.E. Wilton, Oskar Mencer, Wayne Luk, Peter Y.K. Cheung
Reconfigurable Computing: Architectures and Design Methods
IEE Proceedings on Computers and Digital Techniques. vol. 152, no. 2, pp. 193-207. March, 2005.
[Abstract][pdf]

Oskar Mencer, Wayne Luk
Parameterized High Throughput Function Evaluation for FPGAs
The Journal of VLSI Signal Processing, Special Issue on Reconfigurable Computing. March, 2004.
[Abstract]

Wayne Luk, Tom Kean, Arran Derbyshire, Jorn Gause, Steve McKeever, Oskar Mencer, Allen Yeow
Parameterized Hardware Libraries for Configurable System-On-Chip Technology
Can. J. Elect. & Comp. Eng.. vol. 26, no. 3/4, July/Oct, 2002.
[Abstract]

Oskar Mencer, Marco Platzner, Martin Morf, Michael J. Flynn
Object-oriented Domain-Specific Compilers for Programming FPGAs
IEEE Transactions on VLSI, special issue on Reconfigurable Computing. Feb, 2001.
[Abstract][ps][pdf]

Oskar Mencer, Luc Semeria, Martin Morf, Jean-Marc Delosme
Application of Reconfigurable CORDIC Architectures
The Journal of VLSI Signal Processing, special issue on Reconfigurable Computing. March, 2000.
[Abstract][ps][pdf]

W.H. Mangione-Smith, B. Hutchings, D. Andrews, A. DeHon, C. Ebeling, R. Hartenstein, O. Mencer, J. Morris, K. Palem, V. Prasanna, H. Spaanenburg
Seeking Solutions in Configurable Computing
IEEE Computer Magazine. Dec, 1997.
[Abstract]


Conference

Vinay Sriram, David Kearney, Oskar Mencer, Ross Frick
An Accurate Ultra Fast Kolmogorov Phase Screen Generator
Internationl Journal of Modern Physics D (IJMPD) (To appear). 2009} cag_subject = { Cube; Liquid Circuits.

Vinay Sriram, Oskar Mencer
Accelerating the simulation of optical distortion due to atmospheric scintillation using CPUs, GPUs, Cell Broadband Engine and FPGAs
In Proceedings of 28th International Congress on Applications of Lasers and Electro-Optics, Orlando, Florida. November, 2009.

Sriram, V., Kearney, D., Mencer, O., Frick, R.
Improving the Accuracy of the Ultra Fast Kolmogorov Phase Screen Generator.
In Proc of 4th International Workshop on Astronomy and Relativistic Astrophysics,Sao Paulo, Brasil. 4-8 October, 2009.

Vinay Sriram, David Kearney, Oskar Mencer, Ross Frick
Improving the Accuracy of the Ultra Fast Kolmogorov Phase Screen Generator
Proc of 4th International Workshop on Astronomy and Relativistic Astrophysics, Sao Paulo, Brazil. October, 2009.

Simon A. Spacey, Wayne Luk, Paul H.J. Kelly, Daniel Kuhn
Rapid Design Space Visualisation through Hardware/Software Partitioning
Proc. IEEE Southern Programmable Logic Conference. April, 2009.
[pdf]

Oskar Mencer, Kuen Hung Tsoi, Stephen Craimer, Timothy Todman, Wayne Luk, Ming Yee Wong, Philip Heng Wai Leong
CUBE: A 512-FPGA CLUSTER
Proc. IEEE Southern Programmable Logic Conference. April, 2009.
[pdf]

Qiang Wu, Oskar Mencer
Evaluating Sampling Based Hotspot Detection
International Conference on Architecture of Computing Systems. March, 2009.
[pdf]

Qiang Wu, Oskar Mencer
Online Linear Regression of Sampling Data from Performance Event Counters
Workshop on Statistical and Machine learning approaches to ARchitectures and compilaTion. January, 2009.
[pdf]

Zhongda Yuan, Jinian Bian, Qiang Wu, Oskar Mencer
Speedup Factor Estimation through Dynamic Behavior Analysis for FPGA
Joint Conference on Information Sciences. December, 2008.
[pdf]

Haohuan Fu, Oskar Mencer, Wayne Luk
Optimizing Residue Arithmetic on FPGAs
Best Paper Award

Proceeding of International Conference on Field-Programmable Technology 2008 (ICFPT'08). December, 2008.
[ps][pdf]

Tim Todman, Haohuan Fu, Brittle Tsoi, Oskar Mencer, Wayne Luk
Smart enumeration: a systematic approach to exhaustive search (poster)
Submitted to International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS). September 10--12, 2008.
[pdf]

W.G. Osborne, J.G.F. Coutinho, W. Luk, O. Mencer
Reconfigurable Design with Clock Gating
Proc. Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS). July 21-24, 2008.
[pdf]

Kubilay Atasu, Oskar Mencer, Wayne Luk, Can Özturan, Günhan Dündar
Fast Custom Instruction Identification by Convex Subgraph Enumeration
Best Paper Award

Proceeding of the 19th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Leuven, Belgium. July, 2008.
[ps][pdf]

Kubilay Atasu, Timothy Todman, Oskar Mencer, Wayne Luk
Optimal Implementation of Combinational Logic on Lookup Tables
Proceeding of the The Fourth Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Istanbul, Turkey. June, 2008.
[pdf]

Haohuan Fu, William Osborne, Robert Clapp, Oliver Pell
Accelerating Seismic Computations on FPGAs: from the Perspective of Number Representations
Proceeding of 70th EAGE Conference \& Exhibition incorporating SPE EUROPEC, Rome, Italy. June, 2008.

W.G. Osborne, J.G.F. Coutinho, W. Luk, O. Mencer
Power and Branch Aware Word-Length Optimization
Proc. Field-Programmable Custom Computing Machines (FCCM), Palo Alto CA, US. April 13-14, 2008.
[pdf]

Jeehong Yang, Serap A. Savari, Oskar Mencer
An Approach to Graph and Netlist Compression
Data Compression Conference (Dcc 2008). pp. 33-42. 2008.
[pdf]

Tim Todman, Haohuan Fu, Oskar Mencer, Wayne Luk
Improving bounds for FPGA Logic Minimization (poster)
Proc. Field Programmable Technology (FPT). December 12--14, 2007.
[pdf]

William Osborne, Jose Coutinho, Ray Cheung, Wayne Luk, Oskar Mencer
Instrumented Multi-Stage Word-Length Optimization
Proc. Field Programmable Technology (FPT). December 12--14, 2007.
[pdf]

Carlos Tavares, Oskar Mencer, Wayne Luk
Accelerating assembly-level programs (invited presentation)
Workshop on Compiler Assited SoC Assembly (CASA), Salzburg, Austria. September, 2007.
[Abstract][pdf]

William G. Osborne, Ray C.C Cheung, Jose G.G. Coutinho, Wayne Luk, Oskar Mencer
Automatic Accuracy-Guaranteed Bit-width Optimization for Fixed and Floating-Point Systems (poster)
Proc. Field Programmable Logic and Applications (FPL). August 27--29, 2007.

Kentaro Sano, Oskar Mencer, Wayne Luk
FPGA-based Acceleration of the Lattice Boltzmann Method
International Conference on Parallel Computational Fluid Dynamics. 21-24 May, 2007.
[pdf]

H. Fu, O. Mencer, W. Luk
Optimizing Logarithmic Arithmetic on FPGAs
Proc. Field-Programmable Custom Computing Machines (FCCM). April, 2007.
[Abstract][pdf]

Kubilay Atasu, Robert Dimond, Oskar Mencer, Wayne Luk, Can Özturan, Günhan Dündar
Optimizing Instruction-set Extensible Processors under Data Bandwidth Constraints
Design, Automation and Test in Europe Conference and Exhibition, Nice, France. April, 2007.
[Abstract][pdf]

Haohuan Fu, Oskar Mencer, Wayne Luk
Optimizing Hardware Function Evaluation (tutorial)
ARCS'07: Architecture of Computing Systems, Swiss Federal Institute if Technology (ETH) Zurich, Switzerland. March, 2007.
[Abstract]

H. Fu, O. Mencer, W. Luk
Comparing Floating-point and Logarithmic Number Representations for Reconfigurable Acceleration (poster)
Proc. Field Programmable Technology (FPT). December 13--15, 2006.
[Abstract][pdf]

Bower JA, Thomas DB, Luk W, Mencer O
A reconfigurable simulation framework for financial computation
3rd IEEE International Conference on Reconfigurable Computing and FPGAs, San Luis Potosi, MEXICO. September 20-22, 2006.

Lee Howes, Olav Beckmann, Oskar Mencer, Oliver Pell, Paul Price
Comparing FPGAs to Graphics Accelerators and the Playstation 2 Using a Unified Source Description
International Conference on Field-Programmable Logic. August 28-30, 2006.
[Abstract][ps][pdf]

Kubilay Atasu, Robert Dimond, Oskar Mencer, Wayne Luk
Towards Optimal Custom Instruction Processors
IEEE HOT Chips Conference, Stanford. August, 2006.

Lee Howes, Oliver Pell, Oskar Mencer, Olav Beckmann
Accelerating the Development of Hardware Accelerators (poster)
Workshop on Edge Computing. May, 2006.

Lee Howes, Paul Price, Oskar Mencer, Olav Beckmann
FPGAs, GPUs and the PS2 -A Single Programming Methodology
The Fourteenth Annual IEEE Symposium on Field-Programmable Custom Computing Machines. April 24-26, 2006.
[Abstract][ps][pdf]

E. Fiksman, Y. Birk, O. Mencer
ASC-based acceleration using software-only skills (poster)
IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM). April, 2006.

R.G.Dimond, O.Mencer, W.Luk
Automating Processor Customisation: Optimised Memory Access and Resource Sharing
Design Automation and Test in Europe (DATE). March, 2006.

M. P. T. Juvonen, J. G. F. Coutinho, J. L. Wang, B. L. Lo, W. Luk, O. Mencer, G. Z. Yang
Custom Hardware Architectures for Posture Analysis
IEEE International Conference on Field Programmable Technology (FPT). Dec, 2005.
[Abstract][ps][pdf]

Ray C.C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y.K. Cheung
Automating Custom-Precision Function Evaluation for Embedded Processors
International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES). Sept, 2005.
[Abstract][ps][pdf]

Robert Dimond, Oskar Mencer, Wayne Luk
CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools
International Conference on Field Programmable Logic (FPL). August, 2005.
[Abstract][ps][pdf]

Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk
MiniBit: Bit-width optimization via affine arithmetic
Design Automation Conference (DAC). pp. 837-840. 13-17 June, 2005.
[Abstract][ps][pdf]

Jacob Bower, Oskar Mencer, Wayne Luk, Michael J. Flynn, Martin Morf
Dynamically Calibrating Clock Rate for FPGAs
IEEE CoolChips Conference. April, 2005.
[Abstract]

Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk
Adaptive Range Reduction for Hardware Function Evaluation
IEEE International Conference on Field Programmable Technology (FPT). Dec, 2004.
[Abstract][ps][pdf]

Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne Luk
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs
International Conference on Field Programmable Logic (FPL). Sept, 2004.
[Abstract][ps][pdf]

C.J. Tavares, C. Bungardean, G.M. Matos, J.T. de Sousa
Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor
Field Programmable Logic and Application. vol. 3203/2004, pp. 344-353. Wednesday, August 11, 2004.
[pdf]

Altaf A. Gaffar, Oskar Mencer, Wayne Luk, Peter Y.K. Cheung
Unifying Bit-width Optimisation for Fixed-point and Floating-point Designs
IEEE International Conference on Field Programmable Custom Computing Machines (FCCM). April, 2004.
[Abstract][ps][pdf]

Oskar Mencer, David J. Pearce, Lee W. Howes, Wayne Luk
Design Space Exploration with A Stream Compiler
IEEE International Conference on Field Programmable Technology (FPT). pp. 270-277. Dec, 2003.
[Abstract][ps][pdf]

Per Haglund, Oskar Mencer, Wayne Luk, Benjamin Tai
PyHDL: Hardware Scripting with Python
International Conference on Field Programmable Logic (FPL). September, 2003.

Per Haglund, Oskar Mencer, Wayne Luk, Benjamin Tai
Hardware Design with a Scripting Language
Engineering of Reconfigurable Systems and Algorithms (ERSA). June, 2003.

Jian Liang, Russell Tessier, Oskar Mencer
Floating Point Unit Generation and Evaluation for FPGAs
IEEE Symp. on Field-Programmable Custom Computing Machines (FCCM). April, 2003.
[Abstract][ps][pdf]

Altaf A. Gaffar, Oskar Mencer, Wayne Luk, Peter Y.K. Cheung, Nabeel Shirazi
Floating Point Bitwidth Analysis via Automatic Differentiation
Field Programmable Technology (FPT). Dec, 2002.
[Abstract][ps][pdf]

Oskar Mencer, Zhining Huang, Lorenz Huelsbergen
HAGAR: Multi-Context Hardware Graph Accelerators
Field-Programmable Logic (FPL). Sept, 2002.
[Abstract][ps][pdf]

Oskar Mencer
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs
IEEE Symp. on Field-Programmable Custom Computing Machines (FCCM). April, 2002.
[Abstract][ps][pdf]

Oskar Mencer, Nicolas Boullis, Wayne Luk, Henry Styles
Parametrized Function Evaluation on FPGAs
Field-Programmable Logic (FPL). September, 2001.
[Abstract][ps][pdf]

Oskar Mencer, Heiko Huebert, Martin Morf, Michael J. Flynn
StReAm: Object-Oriented Programming of Stream Architectures using PAM-Blox Plenary Session
Field-Programmable Logic (FPL). September, 2000.
[Abstract][ps][pdf]

Oskar Mencer, Martin Morf, Michael J. Flynn
Efficient Digit-Serial Rational Function Evaluation and Digital Filtering Applications
Asilomar Conference on Signals, Systems, and Computers. Nov, 1999.
[Abstract][ps][pdf]

Patrick Hung, Hossam Fahmy, Oskar Mencer, Michael J. Flynn
Fast Division Algorithm with a Small Lookup Table
Asilomar Conference on Signals, Systems, and Computers. Nov, 1999.
[Abstract][ps][pdf]

Oskar Mencer, Martin Morf, Michael J. Flynn
Precision of Semi-Exact Redundant Continued Fraction Arithmetic for VLSI
SPIE '99 (Arithmetic session). July, 1999.
[Abstract][ps][pdf]

Oskar Mencer, Marco Platzner
Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment
Hawaii International Conference on System Sciences (ConfigWare Track). Jan, 1999.
[Abstract][ps][pdf]

Oskar Mencer, Luc R. Semeria, Jean-Marc Delosme, Martin Morf
Application of Reconfigurable CORDIC Architectures
Asilomar Conference on Signals, Systems, and Computers. Nov, 1998.
[Abstract][ps][pdf]

Oskar Mencer, Martin Morf, Michael J. Flynn
Pipelined CORDICs for Reconfigurable Computing
The Sixth FPGA/PLD Design Conference & Exhibit. June, 1998.
[Abstract][ps][pdf]

Oskar Mencer, Martin Morf, Michael J. Flynn
Hardware Software Tri-Design of Encryption for Mobile Communication Units
IEEE International Conference on Acoustics, Speech and Signal Processing. May, 1998.
[Abstract][ps][pdf]

Oskar Mencer, Martin Morf, Michael J. Flynn
PAM-Blox: High Performance FPGA Design for Adaptive Computing
IEEE Symposium on FPGAs for Custom Computing Machines. April, 1998.
[Abstract][ps][pdf]


Technical report

Carlos Tavares, Qiang Wu, Oskar Mencer, Wayne Luk
Binary Analysis of Hot Loops on General Purpose CISC Machines
July, 2009.

Oskar Mencer,Michael J. Flynn, Martin Morf
The M-log-Fraction Transform (MFT) for Computer Arithmetic
Stanford, Computer Systems Laboratory. no. [CSL-TR-99-784], July, 1999.
[Abstract][pdf]

Oskar Mencer, Mark Shand, Michael J. Flynn
FireLink: A High-Performance Adaptive Firewire Interface
DIGITAL Systems Research Center. no. [Compaq (DIGITAL) SRC TechNote 1998-012], Sept, 1997.

Oskar Mencer,Michael J. Flynn
A Selection of Recent Advances in Computer Architecture
Stanford, Computer Systems Laboratory. no. [CSL-TR-97-745], July, 1997.
[Abstract][pdf]


Miscellaneous

Oskar Mencer
Processor Design Tools
1996.


 
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