Custom Hardware Architectures for Posture Analysis
M. P. T. Juvonen, J. G. F. Coutinho, J. L. Wang, B. L. Lo,
W. Luk, O. Mencer and G. Z. Yang
[IEEE Conference on Field Programmable Technology, Singapore, Dec. 2005]

abstract.

This paper describes the design and implementation
of hardware architectures for posture analysis. Posture
analysis is an active research area in computer
vision. It can be used in providing health-care solutions,
such as monitoring home care patients. We report
four contributions in this paper: (a) requirements
for a posture analysis system with hardware support;
(b) a work(c) various architectures and their implementation
based on a high-level hardware design approach;
(d) performance evaluation for our derived designs.
For instance our best design, which targets a Xilinx
XC2V6000 FPGA at 90.2MHz, is able to perform
posture analysis at a rate of 1164 frames per second
with frame size of 320x240 pixels, or 220 frames per
second for DVD quality of 720x576 pixels per frame.
This represents a 145-fold speedup over a software version
running on a 3Ghz Pentium-4 computer.