Field programmable gate arrays (FPGAs), graphics processing
units (GPUs) and Sony¡¯s Playstation 2 vector units offer
scope for hardware acceleration of applications. Implementing
algorithms on multiple architectures can be a long
and complicated process. We demonstrate an approach to
compiling for FPGAs, GPUs and PS2 vector units using a
unified description based on A Stream Compiler (ASC) for
FPGAs. As an example of its use we implement a Montecarlo
simulation using ASC. The unified description allows
us to evaluate optimisations for specific architectures on top
of a single base description, saving time and effort.