Application of Reconfigurable CORDIC Architectures
[The Journal of VLSI Signal Processing, Kluwer 1999]

Oskar Mencer, Luc Semeria, Martin Morf, Jean-Marc Delosme

abstract.

Reconfiguration enables the adaption of Coordinate Rotation DIgital Computer 
(CORDIC) units to the specific needs of sets of applications, hence creating 
application specific CORDIC-style implementations. 

Reconfiguration can be implemented at a high level, taking the entire CORDIC 
unit as a basic cell (CORDIC-cells) implemented in VLSI, or at a low level 
such as Field-Programmable Gate Arrays(FPGAs). We suggest a design methodology
and analyze area/time results for coarse(VLSI) and fine-grain (FPGA) 
reconfigurable CORDIC units. For FPGAs we implement CORDIC units in Verilog 
and our object-oriented design environment, PAM-Blox. For CORDIC-cells, 
multiple reconfigurable CORDIC modules are synthesized with state-of-the-art 
CAD tools.

At the algorithm level we present a case study combining multiple CORDICs 
based on a geometrical interpretation of a normalized ladder algorithm 
for adaptive filtering to reduce latency and area of a fully pipelined 
CORDIC implementation. Ultimately, the goal is to create automatic tools to 
map applications directly to reconfigurable high-level arithmetic units such 
as CORDICs.