Accuracy Guaranteed Bit-Width Optimization [IEEE Transactions on CAD, 2006] Dong-U Lee, Altaf Abdul Gaffar, Ray C.C. Cheung, Oskar Mencer, Wayne Luk, and George A. Constantinides abstract. We present MiniBit, an automated static approach for optimizing bit-widths ofxed-point designs with guaranteed accuracy. Methods to minimize both the integer and fraction parts of fixed-point signals with the aim of minimizing circuit area are described. For range analysis, our technique identifies the number of integer bits necessary to meet range requirements. For precision analysis, we employ a semi-analytical approach with analytical error models in conjunction with adaptive simulated annealing to optimize the number of fraction bits. The analytical models enable us to guarantee overflow/underflow protection and numerical accuracy for all inputs over the user-specified input intervals. Using ASC, A Stream Compiler for Field-programmable gate arrays (FPGAs), we demonstrate our approach with polynomial approximation, RGB to YCbCr conversion, matrix multiplication, B-splines and discrete cosine transform placed-and-routed on a Xilinx Virtex-4 FPGA. Improvements for a given design reduce area and latency by up to 26% and 12% respectively, over a design using optimum uniform fraction bit-widths. Studies show that MiniBit optimized designs are within 1% of the area produced from integer linear programming approach.